Encapsulation Chip Package ECP

JCET’s innovative approach to WLP manufacturing, known as the ECP method, provides customers freedom from wafer diameter constraints, while enabling supply chain simplification and significant cost reductions that are not possible with a conventional manufacturing flow.

ECP Wafer Level Technology

JCET offers a high performance Encapsulation Chip Package (ECP) solution that provides significant bandwidth, performance, form factor and cost benefits compared to other packaging technologies available today.

• Versatile ECP platform for advanced system level integration
• Flexibility to integrate die from diverse processes, manufacturing sources & silicon wafer nodes for increased functionality
• Excellent mechanical, electrical & thermal performance
• Effectively accommodates new lithography nodes
• Enable for both Fan in WLP and Fan out WLP

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