While building world-class advanced packaging technology and large-scale production, JCET continually refines mainstream packaging—innovative process control and collaborative design boost reliability, cut costs, and expand applications.
JCET’s Technical Advantages
JCET’s self-developed HFBP (High-Reliability Flat Bump Packaging), an upgrade of the China Patent Gold Award–winning FBP, has been widely adopted in high-voltage isolation, NOR Flash, DrMOS, MCUs, etc., delivering more cost-effective, stable solutions and earning global acclaim.
Technical Highlights
Advancement of Mainstream Package
Patented HFBP technology for power and signal chain products, with over 10 billion shipments
ECP fan-in and fan-out WLP provides ultra-thin six-sided protection; Full-process capability for power devices with backside metal and frontside copper-nickel-gold RDL
Wide-body SOIC / TSSOP and internal insulation solutions for high-voltage isolation applications
Packaging structures and processes for a full range of sensors including pressure, inertial, magnetic, and optical